313 lines
8.9 KiB
C
313 lines
8.9 KiB
C
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/*
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* Copyright (C) 2017 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/regmap.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "pinctrl-mtk-common.h"
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#include "pinctrl-mtk-mt6765.h"
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static int mtk_pinctrl_set_gpio_pupd_r1r0(struct mtk_pinctrl *pctl,
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unsigned int pin, bool enable, bool isup, unsigned int r1r0)
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{
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unsigned int r0, r1, ret;
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ret = mtk_pinctrl_set_gpio_value(pctl, pin, !isup,
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pctl->devdata->n_pin_pupd, pctl->devdata->pin_pupd_grps);
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if (ret == 0) {
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r0 = r1r0 & 0x1;
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r1 = (r1r0 & 0x2) >> 1;
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mtk_pinctrl_set_gpio_value(pctl, pin, r0,
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pctl->devdata->n_pin_r0, pctl->devdata->pin_r0_grps);
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mtk_pinctrl_set_gpio_value(pctl, pin, r1,
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pctl->devdata->n_pin_r1, pctl->devdata->pin_r1_grps);
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ret = 0;
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}
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return ret;
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}
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static int mtk_pinctrl_get_gpio_pupd_r1r0(struct mtk_pinctrl *pctl,
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unsigned int pin)
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{
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int bit_pupd, bit_r0, bit_r1;
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bit_pupd = mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_pupd, pctl->devdata->pin_pupd_grps);
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if (bit_pupd != -EPERM) {
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bit_r1 = mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_r1, pctl->devdata->pin_r1_grps);
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bit_r0 = mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_r0, pctl->devdata->pin_r0_grps);
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return (!bit_pupd)|(bit_r0<<1)|(bit_r1<<2)|(1<<3);
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}
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return -EPERM;
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}
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static int mtk_pinctrl_get_gpio_pu_pd(struct mtk_pinctrl *pctl,
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unsigned int pin)
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{
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unsigned int bit_pu = 0, bit_pd = 0;
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bit_pu = mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_pu, pctl->devdata->pin_pu_grps);
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bit_pd = mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_pd, pctl->devdata->pin_pd_grps);
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if ((bit_pd != -EPERM) && (bit_pu != -EPERM))
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return (bit_pd)|(bit_pu<<1);
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else if ((bit_pd == -EPERM) && (bit_pu != -EPERM))
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return bit_pu<<1;
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else if ((bit_pd != -EPERM) && (bit_pu == -EPERM))
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return bit_pd;
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else
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return -EPERM;
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}
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static int mtk_pinctrl_set_gpio_pu_pd(struct mtk_pinctrl *pctl,
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unsigned int pin, bool enable, bool isup, unsigned int r1r0)
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{
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mtk_pinctrl_set_gpio_value(pctl, pin, isup,
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pctl->devdata->n_pin_pu, pctl->devdata->pin_pu_grps);
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if (isup == 1)
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mtk_pinctrl_set_gpio_value(pctl, pin, !enable,
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pctl->devdata->n_pin_pd, pctl->devdata->pin_pd_grps);
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else
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mtk_pinctrl_set_gpio_value(pctl, pin, enable,
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pctl->devdata->n_pin_pd, pctl->devdata->pin_pd_grps);
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return 0;
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}
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static int mtk_pinctrl_get_gpio_pullen(struct mtk_pinctrl *pctl,
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unsigned int pin)
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{
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unsigned int pull_en = 0;
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pull_en = mtk_pinctrl_get_gpio_pupd_r1r0(pctl, pin);
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if (pull_en == -EPERM) {
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pull_en = mtk_pinctrl_get_gpio_pu_pd(pctl, pin);
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/*pull_en = [pu,pd], 10,01 pull enabel, others pull disable*/
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if ((pull_en == 0x1) || (pull_en == 0x2))
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pull_en = GPIO_PULL_ENABLE;
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else if (pull_en == -EPERM)
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pull_en = GPIO_PULL_UNSUPPORTED;
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else
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pull_en = GPIO_PULL_DISABLE;
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} else {
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/*pull_en = [r1,r0,pupd], pull disabel 000,001, others enable*/
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if ((pull_en == 0x8) || (pull_en == 0x9))
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pull_en = GPIO_PULL_DISABLE;
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else
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pull_en = GPIO_PULL_ENABLE;
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}
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return pull_en;
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}
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static int mtk_pinctrl_get_gpio_pullsel(struct mtk_pinctrl *pctl,
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unsigned int pin)
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{
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unsigned int pull_sel = 0;
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pull_sel = mtk_pinctrl_get_gpio_pupd_r1r0(pctl, pin);
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if (pull_sel == -EPERM) {
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pull_sel = mtk_pinctrl_get_gpio_pu_pd(pctl, pin);
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/*pull_sel = [pu,pd], 10 is pull up, 01 is pull down*/
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if (pull_sel == 0x02)
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pull_sel = GPIO_PULL_UP;
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else if (pull_sel == 0x01)
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pull_sel = GPIO_PULL_DOWN;
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else if (pull_sel == -EPERM)
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pull_sel = GPIO_PULL_UNSUPPORTED;
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else
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pull_sel = GPIO_NO_PULL;
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}
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return pull_sel;
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}
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static int mtk_pinctrl_set_gpio_pullsel(struct mtk_pinctrl *pctl,
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unsigned int pin, bool enable, bool isup, unsigned int arg)
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{
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int ret = 0;
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#ifndef GPIO_DEBUG
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ret = mtk_pinctrl_set_gpio_pupd_r1r0(pctl, pin, enable, isup, arg);
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if (ret != 0)
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mtk_pinctrl_set_gpio_pu_pd(pctl, pin, enable, isup, arg);
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#else
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pr_debug("mtk_pinctrl_set_gpio_pull,pin=%d,enab=%d,sel=%d\n",
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pin, enable, isup);
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ret = mtk_pinctrl_set_gpio_pupd_r1r0(pctl, pin, enable, isup, arg);
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if (ret != 0)
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mtk_pinctrl_set_gpio_pu_pd(pctl, pin, enable, isup, arg);
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pr_debug("mtk_pinctrl_get_gpio_pull,pin=%d,enab=%d,sel=%d\n",
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pin, mtk_pinctrl_get_gpio_pullen(pctl, pin),
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mtk_pinctrl_get_gpio_pullsel(pctl, pin));
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#endif
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return 0;
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}
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int mtk_pinctrl_get_gpio_mode_for_eint(int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_mode, pctl->devdata->pin_mode_grps);
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}
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static const unsigned int mt6765_debounce_data[] = {
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128, 256, 512, 1024, 16384,
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32768, 65536, 131072, 262144, 524288
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};
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static unsigned int mt6765_spec_debounce_select(unsigned int debounce)
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{
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return mtk_gpio_debounce_select(mt6765_debounce_data,
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ARRAY_SIZE(mt6765_debounce_data), debounce);
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}
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int mtk_irq_domain_xlate_fourcell(struct irq_domain *d,
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struct device_node *ctrlr, const u32 *intspec, unsigned int intsize,
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irq_hw_number_t *out_hwirq, unsigned int *out_type)
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{
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struct mtk_desc_eint *eint;
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int gpio, mode;
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if (WARN_ON(intsize < 4))
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return -EINVAL;
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*out_hwirq = intspec[0];
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*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
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gpio = intspec[2];
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mode = intspec[3];
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eint = (struct mtk_desc_eint *)&pctl->devdata->pins[gpio].eint;
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eint->eintmux = mode;
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eint->eintnum = intspec[0];
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pr_debug("[pinctrl] mtk_pin[%d], eint=%d, mode=%d\n",
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gpio, eint->eintnum, eint->eintmux);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mtk_irq_domain_xlate_fourcell);
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const struct irq_domain_ops mtk_irq_domain_ops = {
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.xlate = mtk_irq_domain_xlate_fourcell,
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};
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static const struct mtk_pinctrl_devdata mt6765_pinctrl_data = {
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.pins = mtk_pins_mt6765,
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.npins = ARRAY_SIZE(mtk_pins_mt6765),
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.pin_mode_grps = mtk_pin_info_mode,
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.n_pin_mode = ARRAY_SIZE(mtk_pin_info_mode),
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.pin_drv_grps = mtk_pin_info_drv,
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.n_pin_drv = ARRAY_SIZE(mtk_pin_info_mode),
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.pin_smt_grps = mtk_pin_info_smt,
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.n_pin_smt = ARRAY_SIZE(mtk_pin_info_smt),
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.pin_ies_grps = mtk_pin_info_ies,
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.n_pin_ies = ARRAY_SIZE(mtk_pin_info_ies),
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.pin_pu_grps = mtk_pin_info_pu,
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.n_pin_pu = ARRAY_SIZE(mtk_pin_info_pu),
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.pin_pd_grps = mtk_pin_info_pd,
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.n_pin_pd = ARRAY_SIZE(mtk_pin_info_pd),
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.pin_pupd_grps = mtk_pin_info_pupd,
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.n_pin_pupd = ARRAY_SIZE(mtk_pin_info_pupd),
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.pin_r0_grps = mtk_pin_info_r0,
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.n_pin_r0 = ARRAY_SIZE(mtk_pin_info_r0),
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.pin_r1_grps = mtk_pin_info_r1,
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.n_pin_r1 = ARRAY_SIZE(mtk_pin_info_r1),
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.pin_dout_grps = mtk_pin_info_dataout,
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.n_pin_dout = ARRAY_SIZE(mtk_pin_info_dataout),
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.pin_din_grps = mtk_pin_info_datain,
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.n_pin_din = ARRAY_SIZE(mtk_pin_info_datain),
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.pin_dir_grps = mtk_pin_info_dir,
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.n_pin_dir = ARRAY_SIZE(mtk_pin_info_dir),
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.mtk_pctl_set_pull_sel = mtk_pinctrl_set_gpio_pullsel,
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.mtk_pctl_get_pull_sel = mtk_pinctrl_get_gpio_pullsel,
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.mtk_pctl_get_pull_en = mtk_pinctrl_get_gpio_pullen,
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.spec_debounce_select = mt6765_spec_debounce_select,
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.mtk_irq_domain_ops = &mtk_irq_domain_ops,
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.type1_start = 179,
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.type1_end = 179,
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.regmap_num = 8,
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.port_shf = 4,
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.port_mask = 0xf,
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.port_align = 4,
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.eint_offsets = {
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.name = "mt6765_eint",
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.stat = 0x000,
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.ack = 0x040,
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.mask = 0x080,
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.mask_set = 0x0c0,
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.mask_clr = 0x100,
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.sens = 0x140,
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.sens_set = 0x180,
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.sens_clr = 0x1c0,
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.soft = 0x200,
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.soft_set = 0x240,
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.soft_clr = 0x280,
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.pol = 0x300,
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.pol_set = 0x340,
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.pol_clr = 0x380,
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.dom_en = 0x400,
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.dbnc_ctrl = 0x500,
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.dbnc_set = 0x600,
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.dbnc_clr = 0x700,
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.port_mask = 7,
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.ports = 6,
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},
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.ap_num = 160,
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.db_cnt = 13,
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};
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static int mtk_pinctrl_probe(struct platform_device *pdev)
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{
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int ret = 0;
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pr_info("[%04d][%s]: probe start..\n", __LINE__, __func__);
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ret = mtk_pctrl_init(pdev, &mt6765_pinctrl_data, NULL);
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pr_info("[%04d][%s]: probe end, ret:%d\n", __LINE__, __func__, ret);
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return ret;
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}
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static const struct of_device_id mtk_pctrl_match[] = {
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{
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.compatible = "mediatek,mt6765-pinctrl",
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}, {
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}
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};
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MODULE_DEVICE_TABLE(of, mt6765_pctrl_match);
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static struct platform_driver mtk_pinctrl_driver = {
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.probe = mtk_pinctrl_probe,
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.driver = {
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.name = "mediatek-mt6765-pinctrl",
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.owner = THIS_MODULE,
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.of_match_table = mtk_pctrl_match,
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.pm = &mtk_eint_pm_ops,
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},
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};
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static int __init mtk_pinctrl_init(void)
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{
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return platform_driver_register(&mtk_pinctrl_driver);
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}
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/* module_init(mtk_pinctrl_init); */
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postcore_initcall(mtk_pinctrl_init);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("MediaTek Pinctrl Driver");
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MODULE_AUTHOR("ZH Chen <zh.chen@mediatek.com>");
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