109 lines
2.6 KiB
C
109 lines
2.6 KiB
C
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/*
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* Marvell PXA family clocks
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*
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* Copyright (C) 2014 Robert Jarzmik
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*
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* Common clock code for PXA clocks ("CKEN" type clocks + DT)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/of.h>
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#include <dt-bindings/clock/pxa-clock.h>
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#include "clk-pxa.h"
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DEFINE_SPINLOCK(lock);
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static struct clk *pxa_clocks[CLK_MAX];
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static struct clk_onecell_data onecell_data = {
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.clks = pxa_clocks,
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.clk_num = CLK_MAX,
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};
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struct pxa_clk {
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struct clk_hw hw;
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struct clk_fixed_factor lp;
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struct clk_fixed_factor hp;
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struct clk_gate gate;
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bool (*is_in_low_power)(void);
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};
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#define to_pxa_clk(_hw) container_of(_hw, struct pxa_clk, hw)
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static unsigned long cken_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct pxa_clk *pclk = to_pxa_clk(hw);
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struct clk_fixed_factor *fix;
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if (!pclk->is_in_low_power || pclk->is_in_low_power())
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fix = &pclk->lp;
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else
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fix = &pclk->hp;
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__clk_hw_set_clk(&fix->hw, hw);
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return clk_fixed_factor_ops.recalc_rate(&fix->hw, parent_rate);
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}
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static struct clk_ops cken_rate_ops = {
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.recalc_rate = cken_recalc_rate,
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};
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static u8 cken_get_parent(struct clk_hw *hw)
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{
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struct pxa_clk *pclk = to_pxa_clk(hw);
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if (!pclk->is_in_low_power)
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return 0;
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return pclk->is_in_low_power() ? 0 : 1;
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}
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static struct clk_ops cken_mux_ops = {
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.get_parent = cken_get_parent,
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.set_parent = dummy_clk_set_parent,
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};
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void __init clkdev_pxa_register(int ckid, const char *con_id,
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const char *dev_id, struct clk *clk)
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{
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if (!IS_ERR(clk) && (ckid != CLK_NONE))
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pxa_clocks[ckid] = clk;
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if (!IS_ERR(clk))
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clk_register_clkdev(clk, con_id, dev_id);
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}
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int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks)
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{
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int i;
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struct pxa_clk *pxa_clk;
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struct clk *clk;
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for (i = 0; i < nb_clks; i++) {
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pxa_clk = kzalloc(sizeof(*pxa_clk), GFP_KERNEL);
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pxa_clk->is_in_low_power = clks[i].is_in_low_power;
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pxa_clk->lp = clks[i].lp;
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pxa_clk->hp = clks[i].hp;
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pxa_clk->gate = clks[i].gate;
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pxa_clk->gate.lock = &lock;
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clk = clk_register_composite(NULL, clks[i].name,
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clks[i].parent_names, 2,
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&pxa_clk->hw, &cken_mux_ops,
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&pxa_clk->hw, &cken_rate_ops,
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&pxa_clk->gate.hw, &clk_gate_ops,
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clks[i].flags);
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clkdev_pxa_register(clks[i].ckid, clks[i].con_id,
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clks[i].dev_id, clk);
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}
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return 0;
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}
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void __init clk_pxa_dt_common_init(struct device_node *np)
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{
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of_clk_add_provider(np, of_clk_src_onecell_get, &onecell_data);
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}
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