325 lines
8.8 KiB
C
325 lines
8.8 KiB
C
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/*
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* Copyright (C) 2016 MediaTek Inc.
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* ShuFanLee <shufan_lee@richtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __RT9466_CHARGER_H
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#define __RT9466_CHARGER_H
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#define RT9466_SLAVE_ADDR 0x53
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#define RT9466_DEVICE_ID_E2 0x81
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#define RT9466_DEVICE_ID_E3 0x82
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#define RT9466_DEVICE_ID_E4 0x83
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enum rt9466_reg_addr {
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RT9466_REG_CORE_CTRL0,
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RT9466_REG_CHG_CTRL1,
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RT9466_REG_CHG_CTRL2,
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RT9466_REG_CHG_CTRL3,
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RT9466_REG_CHG_CTRL4,
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RT9466_REG_CHG_CTRL5,
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RT9466_REG_CHG_CTRL6,
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RT9466_REG_CHG_CTRL7,
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RT9466_REG_CHG_CTRL8,
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RT9466_REG_CHG_CTRL9,
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RT9466_REG_CHG_CTRL10,
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RT9466_REG_CHG_CTRL11,
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RT9466_REG_CHG_CTRL12,
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RT9466_REG_CHG_CTRL13,
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RT9466_REG_CHG_CTRL14,
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RT9466_REG_CHG_CTRL15,
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RT9466_REG_CHG_CTRL16,
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RT9466_REG_CHG_ADC,
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RT9466_REG_CHG_CTRL17 = 0x19,
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RT9466_REG_CHG_CTRL18,
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RT9466_REG_DEVICE_ID = 0x40,
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RT9466_REG_CHG_STAT = 0x42,
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RT9466_REG_CHG_NTC,
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RT9466_REG_ADC_DATA_H,
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RT9466_REG_ADC_DATA_L,
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RT9466_REG_CHG_STATC = 0x50,
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RT9466_REG_CHG_FAULT,
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RT9466_REG_TS_STATC,
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RT9466_REG_CHG_IRQ1,
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RT9466_REG_CHG_IRQ2,
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RT9466_REG_CHG_IRQ3,
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RT9466_REG_CHG_STATC_CTRL = 0x60,
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RT9466_REG_CHG_FAULT_CTRL,
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RT9466_REG_TS_STATC_CTRL,
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RT9466_REG_CHG_IRQ1_CTRL,
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RT9466_REG_CHG_IRQ2_CTRL,
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RT9466_REG_CHG_IRQ3_CTRL,
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RT9466_REG_MAX,
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};
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/* =========================== */
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/* RT9466 Parameter */
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/* =========================== */
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/* mA */
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#define RT9466_ICHG_NUM 64
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#define RT9466_ICHG_MIN 100
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#define RT9466_ICHG_MAX 5000
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#define RT9466_ICHG_STEP 100
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/* mA */
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#define RT9466_IEOC_NUM 16
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#define RT9466_IEOC_MIN 100
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#define RT9466_IEOC_MAX 850
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#define RT9466_IEOC_STEP 50
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/* mV */
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#define RT9466_MIVR_NUM 128
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#define RT9466_MIVR_MIN 3900
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#define RT9466_MIVR_MAX 13400
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#define RT9466_MIVR_STEP 100
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/* mA */
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#define RT9466_AICR_NUM 64
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#define RT9466_AICR_MIN 100
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#define RT9466_AICR_MAX 3250
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#define RT9466_AICR_STEP 50
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/* mV */
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#define RT9466_BAT_VOREG_NUM 128
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#define RT9466_BAT_VOREG_MIN 3900
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#define RT9466_BAT_VOREG_MAX 4710
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#define RT9466_BAT_VOREG_STEP 10
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/* mV */
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#define RT9466_BOOST_VOREG_NUM 64
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#define RT9466_BOOST_VOREG_MIN 4425
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#define RT9466_BOOST_VOREG_MAX 5825
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#define RT9466_BOOST_VOREG_STEP 25
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/* mV */
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#define RT9466_VPREC_NUM 16
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#define RT9466_VPREC_MIN 2000
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#define RT9466_VPREC_MAX 3500
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#define RT9466_VPREC_STEP 100
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/* mA */
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#define RT9466_IPREC_NUM 16
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#define RT9466_IPREC_MIN 100
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#define RT9466_IPREC_MAX 850
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#define RT9466_IPREC_STEP 50
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/* Watchdog fast-charge timer */
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/* hour */
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#define RT9466_WT_FC_NUM 8
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#define RT9466_WT_FC_MIN 4
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#define RT9466_WT_FC_MAX 20
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#define RT9466_WT_FC_STEP 2
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/* IR compensation */
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/* ohm */
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#define RT9466_IRCMP_RES_NUM 8
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#define RT9466_IRCMP_RES_MIN 0
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#define RT9466_IRCMP_RES_MAX 175
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#define RT9466_IRCMP_RES_STEP 25
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/* IR compensation maximum voltage clamp */
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/* mV */
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#define RT9466_IRCMP_VCLAMP_NUM 8
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#define RT9466_IRCMP_VCLAMP_MIN 0
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#define RT9466_IRCMP_VCLAMP_MAX 224
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#define RT9466_IRCMP_VCLAMP_STEP 32
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/* PE+20 voltage */
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/* mV */
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#define RT9466_PEP20_VOLT_NUM 19
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#define RT9466_PEP20_VOLT_MIN 5500
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#define RT9466_PEP20_VOLT_MAX 14500
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#define RT9466_PEP20_VOLT_STEP 500
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/* IIN VTH */
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/* mV */
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#define RT9466_IIN_VTH_NUM 8
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#define RT9466_IIN_VTH_MIN 4100
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#define RT9466_IIN_VTH_MAX 4800
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#define RT9466_IIN_VTH_STEP 100
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/* ADC unit/offset */
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#define RT9466_ADC_UNIT_VBUS_DIV5 25 /* mV */
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#define RT9466_ADC_UNIT_VBUS_DIV2 10 /* mV */
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#define RT9466_ADC_UNIT_VBAT 5 /* mV */
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#define RT9466_ADC_UNIT_VSYS 5 /* mV */
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#define RT9466_ADC_UNIT_REGN 5 /* mV */
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#define RT9466_ADC_UNIT_TS_BAT 25 /* 0.01% */
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#define RT9466_ADC_UNIT_IBAT 50 /* mA */
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#define RT9466_ADC_UNIT_TEMP_JC 2 /* degree */
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#define RT9466_ADC_OFFSET_VBUS_DIV5 0 /* mV */
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#define RT9466_ADC_OFFSET_VBUS_DIV2 0 /* mV */
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#define RT9466_ADC_OFFSET_VBAT 0 /* mV */
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#define RT9466_ADC_OFFSET_VSYS 0 /* mV */
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#define RT9466_ADC_OFFSET_REGN 0 /* mV */
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#define RT9466_ADC_OFFSET_TS_BAT 0 /* % */
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#define RT9466_ADC_OFFSET_IBAT 0 /* mA */
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#define RT9466_ADC_OFFSET_TEMP_JC (-40) /* degree */
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/* ========== CORE_CTRL0 0x00 ============ */
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#define RT9466_SHIFT_RST 7
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#define RT9466_MASK_RST (1 << RT9466_SHIFT_RST)
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/* ========== CHG_CTRL1 0x01 ============ */
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#define RT9466_SHIFT_OPA_MODE 0
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#define RT9466_SHIFT_HZ_EN 2
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#define RT9466_MASK_OPA_MODE (1 << RT9466_SHIFT_OPA_MODE)
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#define RT9466_MASK_HZ_EN (1 << RT9466_SHIFT_HZ_EN)
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/* ========== CHG_CTRL2 0x02 ============ */
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#define RT9466_SHIFT_CHG_EN 0
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#define RT9466_SHIFT_CFO_EN 1
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#define RT9466_SHIFT_IINLMTSEL 2
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#define RT9466_SHIFT_TE_EN 4
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#define RT9466_MASK_CHG_EN (1 << RT9466_SHIFT_CHG_EN)
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#define RT9466_MASK_CFO_EN (1 << RT9466_SHIFT_CFO_EN)
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#define RT9466_MASK_IINLMTSEL 0x0C
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#define RT9466_MASK_TE_EN (1 << RT9466_SHIFT_TE_EN)
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/* ========== CHG_CTRL3 0x03 ============ */
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#define RT9466_SHIFT_AICR 2
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#define RT9466_SHIFT_AICR_EN 1
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#define RT9466_SHIFT_ILIM_EN 0
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#define RT9466_MASK_AICR 0xFC
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#define RT9466_MASK_AICR_EN (1 << RT9466_SHIFT_AICR_EN)
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#define RT9466_MASK_ILIM_EN (1 << RT9466_SHIFT_ILIM_EN)
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/* ========== CHG_CTRL4 0x04 ============ */
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#define RT9466_SHIFT_BAT_VOREG 1
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#define RT9466_MASK_BAT_VOREG 0xFE
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/* ========== CHG_CTRL5 0x05 ============ */
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#define RT9466_SHIFT_BOOST_VOREG 2
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#define RT9466_MASK_BOOST_VOREG 0xFC
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/* ========== CHG_CTRL6 0x06 ============ */
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#define RT9466_SHIFT_MIVR 1
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#define RT9466_SHIFT_MIVR_EN 0
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#define RT9466_MASK_MIVR 0xFE
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#define RT9466_MASK_MIVR_EN (1 << RT9466_SHIFT_MIVR_EN)
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/* ========== CHG_CTRL7 0x07 ============ */
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#define RT9466_SHIFT_ICHG 2
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#define RT9466_MASK_ICHG 0xFC
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/* ========== CHG_CTRL8 0x08 ============ */
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#define RT9466_SHIFT_VPREC 4
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#define RT9466_SHIFT_IPREC 0
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#define RT9466_MASK_VPREC 0xF0
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#define RT9466_MASK_IPREC 0x0F
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/* ========== CHG_CTRL9 0x09 ============ */
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#define RT9466_SHIFT_IEOC 4
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#define RT9466_MASK_IEOC 0xF0
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/* ========== CHG_CTRL10 0x0A ============ */
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#define RT9466_SHIFT_BOOST_OC 0
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#define RT9466_MASK_BOOST_OC 0x07
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/* ========== CHG_CTRL12 0x0C ============ */
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#define RT9466_SHIFT_TMR_EN 1
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#define RT9466_SHIFT_WT_FC 5
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#define RT9466_MASK_TMR_EN (1 << RT9466_SHIFT_TMR_EN)
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#define RT9466_MASK_WT_FC 0xE0
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/* ========== CHG_CTRL13 0x0D ============ */
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#define RT9466_SHIFT_WDT_EN 7
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#define RT9466_MASK_WDT_EN (1 << RT9466_SHIFT_WDT_EN)
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/* ========== CHG_CTRL14 0x0E ============ */
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#define RT9466_SHIFT_IIN_MEAS 7
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#define RT9466_SHIFT_IIN_VTH 0
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#define RT9466_MASK_IIN_MEAS (1 << RT9466_SHIFT_IIN_MEAS)
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#define RT9466_MASK_IIN_VTH 0x07
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/* ========== CHG_CTRL16 0x10 ============ */
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#define RT9466_SHIFT_JEITA_EN 4
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#define RT9466_MASK_JEITA_EN (1 << RT9466_SHIFT_JEITA_EN)
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/* ========== CHG_ADC 0x11 ============ */
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#define RT9466_SHIFT_ADC_IN_SEL 4
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#define RT9466_SHIFT_ADC_START 0
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#define RT9466_MASK_ADC_IN_SEL 0xF0
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#define RT9466_MASK_ADC_START (1 << RT9466_SHIFT_ADC_START)
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/* ========== CHG_CTRL17 0x19 ============ */
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#define RT9466_SHIFT_PUMPX_EN 7
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#define RT9466_SHIFT_PUMPX_20_10 6 /* Version of PE */
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#define RT9466_SHIFT_PUMPX_UP_DN 5
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#define RT9466_SHIFT_PUMPX_DEC 0
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#define RT9466_MASK_PUMPX_EN (1 << RT9466_SHIFT_PUMPX_EN)
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#define RT9466_MASK_PUMPX_20_10 (1 << RT9466_SHIFT_PUMPX_20_10)
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#define RT9466_MASK_PUMPX_UP_DN (1 << RT9466_SHIFT_PUMPX_UP_DN)
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#define RT9466_MASK_PUMPX_DEC 0x1F
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/* ========== CHG_CTRL18 0x1A ============ */
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#define RT9466_SHIFT_IRCMP_RES 3
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#define RT9466_SHIFT_IRCMP_VCLAMP 0
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#define RT9466_MASK_IRCMP_RES 0x38
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#define RT9466_MASK_IRCMP_VCLAMP 0x07
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/* ========== CHG_STAT 0x42 ============ */
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#define RT9466_SHIFT_ADC_STAT 0
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#define RT9466_SHIFT_CHG_STAT 6
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#define RT9466_MASK_ADC_STAT (1 << RT9466_SHIFT_ADC_STAT)
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#define RT9466_MASK_CHG_STAT 0xC0
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/* ========== CHG_STATC 0x50 ============ */
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#define RT9466_SHIFT_CHG_MIVR 6
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#define RT9466_SHIFT_CHG_AICR 5
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#define RT9466_MASK_CHG_MIVR (1 << RT9466_SHIFT_CHG_MIVR)
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#define RT9466_MASK_CHG_AICR (1 << RT9466_SHIFT_CHG_AICR)
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/* ========== CHG_IRQ2 0x54 ============ */
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#define RT9466_SHIFT_CHG_IIN_MEASI 0
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#define RT9466_SHIFT_SSFINISHI 4
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#define RT9466_MASK_CHG_IIN_MEASI (1 << RT9466_SHIFT_CHG_IIN_MEASI)
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#define RT9466_MASK_SSFINISHI (1 << RT9466_SHIFT_SSFINISHI)
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/* ========== CHG_IRQ3 0x55 ============ */
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#define RT9466_SHIFT_ADC_DONEI 0
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#define RT9466_SHIFT_PUMPX_DONEI 1
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#define RT9466_MASK_ADC_DONEI (1 << RT9466_SHIFT_ADC_DONEI)
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#define RT9466_MASK_PUMPX_DONEI (1 << RT9466_SHIFT_PUMPX_DONEI)
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/* ========== CHG_STATC_CTRL 0x60 ============ */
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#define RT9466_SHIFT_CHG_MIVRM 6
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#define RT9466_SHIFT_CHG_AICRM 5
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#define RT9466_MASK_CHG_MIVRM (1 << RT9466_SHIFT_CHG_MIVRM)
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#define RT9466_MASK_CHG_AICRM (1 << RT9466_SHIFT_CHG_AICRM)
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#endif /* __RT9466_CHARGER_H */
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