463 lines
17 KiB
Text
463 lines
17 KiB
Text
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Performance Counters for Linux
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------------------------------
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Performance counters are special hardware registers available on most modern
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CPUs. These registers count the number of certain types of hw events: such
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as instructions executed, cachemisses suffered, or branches mis-predicted -
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without slowing down the kernel or applications. These registers can also
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trigger interrupts when a threshold number of events have passed - and can
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thus be used to profile the code that runs on that CPU.
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The Linux Performance Counter subsystem provides an abstraction of these
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hardware capabilities. It provides per task and per CPU counters, counter
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groups, and it provides event capabilities on top of those. It
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provides "virtual" 64-bit counters, regardless of the width of the
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underlying hardware counters.
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Performance counters are accessed via special file descriptors.
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There's one file descriptor per virtual counter used.
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The special file descriptor is opened via the sys_perf_event_open()
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system call:
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int sys_perf_event_open(struct perf_event_attr *hw_event_uptr,
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pid_t pid, int cpu, int group_fd,
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unsigned long flags);
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The syscall returns the new fd. The fd can be used via the normal
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VFS system calls: read() can be used to read the counter, fcntl()
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can be used to set the blocking mode, etc.
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Multiple counters can be kept open at a time, and the counters
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can be poll()ed.
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When creating a new counter fd, 'perf_event_attr' is:
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struct perf_event_attr {
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/*
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* The MSB of the config word signifies if the rest contains cpu
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* specific (raw) counter configuration data, if unset, the next
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* 7 bits are an event type and the rest of the bits are the event
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* identifier.
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*/
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__u64 config;
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__u64 irq_period;
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__u32 record_type;
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__u32 read_format;
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__u64 disabled : 1, /* off by default */
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inherit : 1, /* children inherit it */
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pinned : 1, /* must always be on PMU */
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exclusive : 1, /* only group on PMU */
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exclude_user : 1, /* don't count user */
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exclude_kernel : 1, /* ditto kernel */
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exclude_hv : 1, /* ditto hypervisor */
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exclude_idle : 1, /* don't count when idle */
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mmap : 1, /* include mmap data */
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munmap : 1, /* include munmap data */
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comm : 1, /* include comm data */
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__reserved_1 : 52;
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__u32 extra_config_len;
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__u32 wakeup_events; /* wakeup every n events */
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__u64 __reserved_2;
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__u64 __reserved_3;
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};
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The 'config' field specifies what the counter should count. It
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is divided into 3 bit-fields:
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raw_type: 1 bit (most significant bit) 0x8000_0000_0000_0000
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type: 7 bits (next most significant) 0x7f00_0000_0000_0000
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event_id: 56 bits (least significant) 0x00ff_ffff_ffff_ffff
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If 'raw_type' is 1, then the counter will count a hardware event
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specified by the remaining 63 bits of event_config. The encoding is
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machine-specific.
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If 'raw_type' is 0, then the 'type' field says what kind of counter
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this is, with the following encoding:
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enum perf_type_id {
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PERF_TYPE_HARDWARE = 0,
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PERF_TYPE_SOFTWARE = 1,
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PERF_TYPE_TRACEPOINT = 2,
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};
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A counter of PERF_TYPE_HARDWARE will count the hardware event
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specified by 'event_id':
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/*
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* Generalized performance counter event types, used by the hw_event.event_id
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* parameter of the sys_perf_event_open() syscall:
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*/
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enum perf_hw_id {
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/*
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* Common hardware events, generalized by the kernel:
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*/
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PERF_COUNT_HW_CPU_CYCLES = 0,
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PERF_COUNT_HW_INSTRUCTIONS = 1,
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PERF_COUNT_HW_CACHE_REFERENCES = 2,
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PERF_COUNT_HW_CACHE_MISSES = 3,
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PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
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PERF_COUNT_HW_BRANCH_MISSES = 5,
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PERF_COUNT_HW_BUS_CYCLES = 6,
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};
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These are standardized types of events that work relatively uniformly
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on all CPUs that implement Performance Counters support under Linux,
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although there may be variations (e.g., different CPUs might count
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cache references and misses at different levels of the cache hierarchy).
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If a CPU is not able to count the selected event, then the system call
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will return -EINVAL.
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More hw_event_types are supported as well, but they are CPU-specific
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and accessed as raw events. For example, to count "External bus
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cycles while bus lock signal asserted" events on Intel Core CPUs, pass
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in a 0x4064 event_id value and set hw_event.raw_type to 1.
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A counter of type PERF_TYPE_SOFTWARE will count one of the available
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software events, selected by 'event_id':
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/*
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* Special "software" counters provided by the kernel, even if the hardware
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* does not support performance counters. These counters measure various
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* physical and sw events of the kernel (and allow the profiling of them as
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* well):
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*/
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enum perf_sw_ids {
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PERF_COUNT_SW_CPU_CLOCK = 0,
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PERF_COUNT_SW_TASK_CLOCK = 1,
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PERF_COUNT_SW_PAGE_FAULTS = 2,
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PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
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PERF_COUNT_SW_CPU_MIGRATIONS = 4,
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PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
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PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
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PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
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PERF_COUNT_SW_EMULATION_FAULTS = 8,
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};
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Counters of the type PERF_TYPE_TRACEPOINT are available when the ftrace event
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tracer is available, and event_id values can be obtained from
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/debug/tracing/events/*/*/id
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Counters come in two flavours: counting counters and sampling
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counters. A "counting" counter is one that is used for counting the
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number of events that occur, and is characterised by having
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irq_period = 0.
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A read() on a counter returns the current value of the counter and possible
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additional values as specified by 'read_format', each value is a u64 (8 bytes)
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in size.
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/*
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* Bits that can be set in hw_event.read_format to request that
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* reads on the counter should return the indicated quantities,
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* in increasing order of bit value, after the counter value.
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*/
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enum perf_event_read_format {
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PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
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PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
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};
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Using these additional values one can establish the overcommit ratio for a
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particular counter allowing one to take the round-robin scheduling effect
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into account.
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A "sampling" counter is one that is set up to generate an interrupt
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every N events, where N is given by 'irq_period'. A sampling counter
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has irq_period > 0. The record_type controls what data is recorded on each
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interrupt:
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/*
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* Bits that can be set in hw_event.record_type to request information
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* in the overflow packets.
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*/
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enum perf_event_record_format {
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PERF_RECORD_IP = 1U << 0,
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PERF_RECORD_TID = 1U << 1,
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PERF_RECORD_TIME = 1U << 2,
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PERF_RECORD_ADDR = 1U << 3,
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PERF_RECORD_GROUP = 1U << 4,
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PERF_RECORD_CALLCHAIN = 1U << 5,
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};
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Such (and other) events will be recorded in a ring-buffer, which is
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available to user-space using mmap() (see below).
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The 'disabled' bit specifies whether the counter starts out disabled
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or enabled. If it is initially disabled, it can be enabled by ioctl
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or prctl (see below).
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The 'inherit' bit, if set, specifies that this counter should count
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events on descendant tasks as well as the task specified. This only
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applies to new descendents, not to any existing descendents at the
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time the counter is created (nor to any new descendents of existing
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descendents).
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The 'pinned' bit, if set, specifies that the counter should always be
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on the CPU if at all possible. It only applies to hardware counters
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and only to group leaders. If a pinned counter cannot be put onto the
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CPU (e.g. because there are not enough hardware counters or because of
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a conflict with some other event), then the counter goes into an
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'error' state, where reads return end-of-file (i.e. read() returns 0)
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until the counter is subsequently enabled or disabled.
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The 'exclusive' bit, if set, specifies that when this counter's group
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is on the CPU, it should be the only group using the CPU's counters.
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In future, this will allow sophisticated monitoring programs to supply
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extra configuration information via 'extra_config_len' to exploit
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advanced features of the CPU's Performance Monitor Unit (PMU) that are
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not otherwise accessible and that might disrupt other hardware
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counters.
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The 'exclude_user', 'exclude_kernel' and 'exclude_hv' bits provide a
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way to request that counting of events be restricted to times when the
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CPU is in user, kernel and/or hypervisor mode.
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The 'mmap' and 'munmap' bits allow recording of PROT_EXEC mmap/munmap
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operations, these can be used to relate userspace IP addresses to actual
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code, even after the mapping (or even the whole process) is gone,
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these events are recorded in the ring-buffer (see below).
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The 'comm' bit allows tracking of process comm data on process creation.
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This too is recorded in the ring-buffer (see below).
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The 'pid' parameter to the sys_perf_event_open() system call allows the
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counter to be specific to a task:
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pid == 0: if the pid parameter is zero, the counter is attached to the
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current task.
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pid > 0: the counter is attached to a specific task (if the current task
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has sufficient privilege to do so)
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pid < 0: all tasks are counted (per cpu counters)
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The 'cpu' parameter allows a counter to be made specific to a CPU:
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cpu >= 0: the counter is restricted to a specific CPU
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cpu == -1: the counter counts on all CPUs
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(Note: the combination of 'pid == -1' and 'cpu == -1' is not valid.)
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A 'pid > 0' and 'cpu == -1' counter is a per task counter that counts
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events of that task and 'follows' that task to whatever CPU the task
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gets schedule to. Per task counters can be created by any user, for
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their own tasks.
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A 'pid == -1' and 'cpu == x' counter is a per CPU counter that counts
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all events on CPU-x. Per CPU counters need CAP_SYS_ADMIN privilege.
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The 'flags' parameter is currently unused and must be zero.
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The 'group_fd' parameter allows counter "groups" to be set up. A
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counter group has one counter which is the group "leader". The leader
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is created first, with group_fd = -1 in the sys_perf_event_open call
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that creates it. The rest of the group members are created
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subsequently, with group_fd giving the fd of the group leader.
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(A single counter on its own is created with group_fd = -1 and is
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considered to be a group with only 1 member.)
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A counter group is scheduled onto the CPU as a unit, that is, it will
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only be put onto the CPU if all of the counters in the group can be
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put onto the CPU. This means that the values of the member counters
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can be meaningfully compared, added, divided (to get ratios), etc.,
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with each other, since they have counted events for the same set of
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executed instructions.
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Like stated, asynchronous events, like counter overflow or PROT_EXEC mmap
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tracking are logged into a ring-buffer. This ring-buffer is created and
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accessed through mmap().
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The mmap size should be 1+2^n pages, where the first page is a meta-data page
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(struct perf_event_mmap_page) that contains various bits of information such
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as where the ring-buffer head is.
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/*
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* Structure of the page that can be mapped via mmap
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*/
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struct perf_event_mmap_page {
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__u32 version; /* version number of this structure */
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__u32 compat_version; /* lowest version this is compat with */
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/*
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* Bits needed to read the hw counters in user-space.
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*
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* u32 seq;
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* s64 count;
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*
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* do {
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* seq = pc->lock;
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*
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* barrier()
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* if (pc->index) {
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* count = pmc_read(pc->index - 1);
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* count += pc->offset;
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* } else
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* goto regular_read;
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*
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* barrier();
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* } while (pc->lock != seq);
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*
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* NOTE: for obvious reason this only works on self-monitoring
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* processes.
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*/
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__u32 lock; /* seqlock for synchronization */
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__u32 index; /* hardware counter identifier */
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__s64 offset; /* add to hardware counter value */
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/*
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* Control data for the mmap() data buffer.
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*
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* User-space reading this value should issue an rmb(), on SMP capable
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* platforms, after reading this value -- see perf_event_wakeup().
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*/
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__u32 data_head; /* head in the data section */
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};
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NOTE: the hw-counter userspace bits are arch specific and are currently only
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implemented on powerpc.
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The following 2^n pages are the ring-buffer which contains events of the form:
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#define PERF_RECORD_MISC_KERNEL (1 << 0)
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#define PERF_RECORD_MISC_USER (1 << 1)
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#define PERF_RECORD_MISC_OVERFLOW (1 << 2)
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struct perf_event_header {
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__u32 type;
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__u16 misc;
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__u16 size;
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};
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enum perf_event_type {
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/*
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* The MMAP events record the PROT_EXEC mappings so that we can
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* correlate userspace IPs to code. They have the following structure:
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*
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* struct {
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* struct perf_event_header header;
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*
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* u32 pid, tid;
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* u64 addr;
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* u64 len;
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* u64 pgoff;
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* char filename[];
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* };
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*/
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PERF_RECORD_MMAP = 1,
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PERF_RECORD_MUNMAP = 2,
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/*
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* struct {
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* struct perf_event_header header;
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*
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* u32 pid, tid;
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||
|
|
* char comm[];
|
||
|
|
* };
|
||
|
|
*/
|
||
|
|
PERF_RECORD_COMM = 3,
|
||
|
|
|
||
|
|
/*
|
||
|
|
* When header.misc & PERF_RECORD_MISC_OVERFLOW the event_type field
|
||
|
|
* will be PERF_RECORD_*
|
||
|
|
*
|
||
|
|
* struct {
|
||
|
|
* struct perf_event_header header;
|
||
|
|
*
|
||
|
|
* { u64 ip; } && PERF_RECORD_IP
|
||
|
|
* { u32 pid, tid; } && PERF_RECORD_TID
|
||
|
|
* { u64 time; } && PERF_RECORD_TIME
|
||
|
|
* { u64 addr; } && PERF_RECORD_ADDR
|
||
|
|
*
|
||
|
|
* { u64 nr;
|
||
|
|
* { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
|
||
|
|
*
|
||
|
|
* { u16 nr,
|
||
|
|
* hv,
|
||
|
|
* kernel,
|
||
|
|
* user;
|
||
|
|
* u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
|
||
|
|
* };
|
||
|
|
*/
|
||
|
|
};
|
||
|
|
|
||
|
|
NOTE: PERF_RECORD_CALLCHAIN is arch specific and currently only implemented
|
||
|
|
on x86.
|
||
|
|
|
||
|
|
Notification of new events is possible through poll()/select()/epoll() and
|
||
|
|
fcntl() managing signals.
|
||
|
|
|
||
|
|
Normally a notification is generated for every page filled, however one can
|
||
|
|
additionally set perf_event_attr.wakeup_events to generate one every
|
||
|
|
so many counter overflow events.
|
||
|
|
|
||
|
|
Future work will include a splice() interface to the ring-buffer.
|
||
|
|
|
||
|
|
|
||
|
|
Counters can be enabled and disabled in two ways: via ioctl and via
|
||
|
|
prctl. When a counter is disabled, it doesn't count or generate
|
||
|
|
events but does continue to exist and maintain its count value.
|
||
|
|
|
||
|
|
An individual counter can be enabled with
|
||
|
|
|
||
|
|
ioctl(fd, PERF_EVENT_IOC_ENABLE, 0);
|
||
|
|
|
||
|
|
or disabled with
|
||
|
|
|
||
|
|
ioctl(fd, PERF_EVENT_IOC_DISABLE, 0);
|
||
|
|
|
||
|
|
For a counter group, pass PERF_IOC_FLAG_GROUP as the third argument.
|
||
|
|
Enabling or disabling the leader of a group enables or disables the
|
||
|
|
whole group; that is, while the group leader is disabled, none of the
|
||
|
|
counters in the group will count. Enabling or disabling a member of a
|
||
|
|
group other than the leader only affects that counter - disabling an
|
||
|
|
non-leader stops that counter from counting but doesn't affect any
|
||
|
|
other counter.
|
||
|
|
|
||
|
|
Additionally, non-inherited overflow counters can use
|
||
|
|
|
||
|
|
ioctl(fd, PERF_EVENT_IOC_REFRESH, nr);
|
||
|
|
|
||
|
|
to enable a counter for 'nr' events, after which it gets disabled again.
|
||
|
|
|
||
|
|
A process can enable or disable all the counter groups that are
|
||
|
|
attached to it, using prctl:
|
||
|
|
|
||
|
|
prctl(PR_TASK_PERF_EVENTS_ENABLE);
|
||
|
|
|
||
|
|
prctl(PR_TASK_PERF_EVENTS_DISABLE);
|
||
|
|
|
||
|
|
This applies to all counters on the current process, whether created
|
||
|
|
by this process or by another, and doesn't affect any counters that
|
||
|
|
this process has created on other processes. It only enables or
|
||
|
|
disables the group leaders, not any other members in the groups.
|
||
|
|
|
||
|
|
|
||
|
|
Arch requirements
|
||
|
|
-----------------
|
||
|
|
|
||
|
|
If your architecture does not have hardware performance metrics, you can
|
||
|
|
still use the generic software counters based on hrtimers for sampling.
|
||
|
|
|
||
|
|
So to start with, in order to add HAVE_PERF_EVENTS to your Kconfig, you
|
||
|
|
will need at least this:
|
||
|
|
- asm/perf_event.h - a basic stub will suffice at first
|
||
|
|
- support for atomic64 types (and associated helper functions)
|
||
|
|
|
||
|
|
If your architecture does have hardware capabilities, you can override the
|
||
|
|
weak stub hw_perf_event_init() to register hardware counters.
|
||
|
|
|
||
|
|
Architectures that have d-cache aliassing issues, such as Sparc and ARM,
|
||
|
|
should select PERF_USE_VMALLOC in order to avoid these for perf mmap().
|