29 lines
1 KiB
C
29 lines
1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
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* Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
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*/
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#ifndef _ASM_M32R_DCACHE_CLEAR_H
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#define _ASM_M32R_DCACHE_CLEAR_H
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#ifdef CONFIG_CHIP_M32700_TS1
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#define DCACHE_CLEAR(reg0, reg1, addr) \
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"seth "reg1", #high(dcache_dummy); \n\t" \
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"or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
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"lock "reg0", @"reg1"; \n\t" \
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"add3 "reg0", "addr", #0x1000; \n\t" \
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"ld "reg0", @"reg0"; \n\t" \
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"add3 "reg0", "addr", #0x2000; \n\t" \
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"ld "reg0", @"reg0"; \n\t" \
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"unlock "reg0", @"reg1"; \n\t"
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/* FIXME: This workaround code cannot handle kernel modules
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* correctly under SMP environment.
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*/
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#else /* CONFIG_CHIP_M32700_TS1 */
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#define DCACHE_CLEAR(reg0, reg1, addr)
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#endif /* CONFIG_CHIP_M32700_TS1 */
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#endif /* _ASM_M32R_DCACHE_CLEAR_H */
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